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PROCESSOR CONTROL SOFTWARE
PROCESSOR CONTROL PC

PROCESSOR CONTROL SOFTWARE

–is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. The processor must have a way of saving information about its state or context so that it can be restored upon return from the.

PROCESSOR CONTROL PC

_ enable the input to the PC for receiving a value that is currently on the internal processor bus. In which one of the following techniques, the time a processor spends waiting for instructions to be fetched The external interface of FALCON-A consists of a _ data bus. Required which may be used to select the appropriate function for the ALU to be performed, to select theĪppropriate registers, or the appropriate memory location.

Which one of the following registers holds the instruction that is being executed?įor any of the instructions that are a part of the instruction set of the SRC, there are certain _ Motorola MC68000 is an example of -microprocessor. It is describing the internal organization of digital computers c) It is an elementary operation performed (during one clock pulse), on the information stored in one or more registers d) It is high level language.Which one of the following is/are the features of Register Transfer Language? a) It is a symbolic language Which one of the following is the highest level of abstraction in digital design in which the computerĪrchitect views the system for the description of system components and their interconnections? It is easier to maintain the “family concept” in RISC CPU.(c) Instruction pipelining has helped RISC CPU’s to attain a target of 1 cycle per instruction. (b) RISC CPUs outperform CISC CPU’s in procedural programmingĮnvironments. Processors? (a) Keeping regularly accessed variables in registers as opposed to keeping them in memoryįacilitates faster execution. Which of the following statements is/are true about RISC processors’ claimed advantages over CISC Which type of instructions help in changing the flow of the program as and when required? It will store the register R8 contents to the memory location M.It will load the register R8 with the relative address itself (PC+34).It will load the register R8 with the contents of the memory location M.Which one of the instructions requires two source registers? The CPU includes three types of instructions, which have different operands and will need different representations.

Which one of the following circuit design levels is called the gate level? Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example.

Processor-Memory-Switch level (PMS level).

Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections? Which one of the following portions of an instruction represents the operation to be performed? What is the instruction length of the FALCON-E processor?

It will store the register R3 contents to the memory location M.

It will load the register R3 with the relative address itself (PC+58).

It will load the register R3 with the contents of the memory location M.

To hold the address of the next instruction in memory that is to be executed 51) What does the instruction “ldr R3, 58” of SRC do?.

To hold the address of the current process.

To hold the current status of the processor.

What is the working of Processor Status Word (PSW How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL. What is the size of the memory space that is available to FALCON-A processor?

To hold the address of the next instruction in memory that is to be executed.

To hold the instruction that the computer is currently processing.

To hold the current address of the process.

To hold the current status of the processor.

What is the working of Processor Status Word (PSW)? Program Counter(PC) holds the memory address of: What functionality is performed by the instruction “str R8, 34” of SRC? Which of the following register is used to enable the tri-stable buffers with the MBR? – provides a temporary storage for the address of memory location to be accessed. In case of FALCON-A- instruction are present which are not present in SRC processor. Which of the following control signal is NOT activated during instruction fetch operation? Which field of machine language instruction is the “type of operation” that is to be performed. – Instruction is used to divide a register value by immediate value in FALCON-E processor. Which of the following condition is evaluated when executing the branch instruction “brzr R2, R1”?